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C HAPTER 4: P LACE AND R OUTE
I NTRODUCTION
Introduction
The Quartus II Fitter places and routes your design, which is also referred to
as “fitting” in the Quartus II software. Using the database that has been
created by Analysis & Synthesis, the Fitter matches the logic and timing
requirements of the project with the available resources of the target device.
It assigns each logic function to the best logic cell location for routing and
timing, and selects appropriate interconnection paths and pin assignments.
Figure 1 shows the place and route design flow.
Figure 1. Place and Route Design Flow
f r o m Q u a r t u s II
to Q u a r t u s II ti m i n g
A n alysis &
Sy n thesis
Compiler
Database
Files ( .cdb )
Quartus II
Settings
Q u a r t u s II Fitte r
q u a rtus_fit
Q u a r t u s II
Desig n Assista n t
q u a rtus_drc
a n alysis, EDA Netlist
W r ite r , o r Asse m ble r
Report Files
( .rpt , .htm )
Files ( .qsf )
If you have made resource assignments in your design, the Fitter attempts to
match those resource assignments with the resources on the device, tries to
meet any other constraints you have set, and then attempts to optimize the
remaining logic in the design. If you have not set any constraints on the
design, the Fitter automatically optimizes it. If it cannot find a fit, the Fitter
terminates compilation and issues an error message.
In the Compilation Process Settings page of the Settings dialog box, you
can specify whether you want to perform a normal compilation or smart
compilation. With a smart compilation, the Compiler creates a detailed
database that can help future compilations run faster, but may consume
extra disk space. During a smart recompilation, the Compiler evaluates the
changes made to the current design since the last compilation and then runs
only the Compiler modules that are required to process those changes. If you
make any changes to the logic of a design, the Compiler uses all modules
during processing.
52
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I NTRODUCTION TO THE Q UARTUS II S OFTWARE
A LTERA C ORPORATION
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相关PDF资料
SW-QUARTUS-SE-FLT SUBSCRIPTION FLOATALL REPL
SW006012 C COMPILER FOR DSPIC30F FAMILY
SW006013 C COMPILER MPLAB FOR DSPIC DSC
SW006015 C COMPILER MPLAB C32
SW300003-EVAL LIBRARY SOFT MODEM-EVAL ONLY
SW300010-EVAL SPEECH RECOG LIBRARY-EVAL ONLY
SW300040-EVAL LIBRARY NOISE SUPPR-EVAL ONLY
SW300060-EVAL LIBRARY ACOUSTIC ECHO-EVAL ONLY
相关代理商/技术参数
SW-QUARTUS-SE-FLT 功能描述:开发软件 FLOATING LICENSE FOR QUARTUS II RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
SWR 制造商:RUBYCON 制造商全称:RUBYCON CORPORATION 功能描述:METALLIZED POLYESTER FILM CAPACITORS
SWR-1 制造商:Sunhayato 功能描述:
SWR100MD 功能描述:基准电压& 基准电流 Sine Wave Ref. Custom RoHS:否 制造商:STMicroelectronics 产品:Voltage References 拓扑结构:Shunt References 参考类型:Programmable 输出电压:1.24 V to 18 V 初始准确度:0.25 % 平均温度系数（典型值）:100 PPM / C 串联 VREF - 输入电压（最大值）: 串联 VREF - 输入电压（最小值）: 分流电流（最大值）:60 mA 最大工作温度:+ 125 C 封装 / 箱体:SOT-23-3L 封装:Reel
SWR-10-12 制造商:Raxxess 功能描述:Wall Mount 10RU Hinged Rack with 12" Usable Depth
SWR1062/C 制造商:BRITOOL 功能描述:RING SPANNER CRANK SLOG 1 1/16AF
SWR1125 制造商:BRITOOL 功能描述:RING SPANNER FLAT SLOG 1 1/8AF
SWR1187 制造商:BRITOOL 功能描述:RING SPANNER FLAT SLOG 1 3/16AF